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// Where conventional RIE hits its limit
Conventional RIEAI-native ALE
01Sub-3nm logic nodes
02300-layer NAND stacks
03Vertical DRAM architectures
04Silicon photonics supply chain
AI-native ALE is the way through
// The inflection

The manufacturing inflection is here.

Are your process and products keeping up?

AI-driven semiconductor process visualization
Fig. — AI-native process controlAI

At sub-3nm logic nodes, inside increasing 3D NAND stacks, across the transition to vertical DRAM architectures, and throughout the growing silicon photonics applications, conventional reactive ion etching is hitting its limits.

The common thread is not the device type. It is the precision requirement. At each of these inflection points, the etch step that determines yield is one that demands atomic-scale control. That is where Atomic Layer Etching (ALE) is increasing in intensity and is expected to grow by 20X over the next few years.

// Proven

Proven performance.

AAT's platform has been independently validated at SPIE Advanced Lithography + Patterning, demonstrating true self-limiting ALE behavior across two operating modes:

High Throughput Mode
~0 Å/ cycle
Etch per cycle (EPC)
  • Synergy Factor>90%
  • Linearity (R²)>0.9997
  • Cycle Time~2 seconds
High Precision Mode
~0 Å/ cycle
Etch per cycle (EPC)
  • Synergy Factor>80%
  • Linearity (R²)>0.9947
  • Cycle Time~2 seconds

Both modes operate in the same chamber, switched algorithmically based on the process requirement. No tool changeover. No separate qualification.

Source: SPIE Advanced Lithography + Patterning 2026, Paper 13984-24

// Build the angstrom era

Let's etch the future, one atom at a time.

Talk to our team about ALE process development, equipment demonstration, or partnership opportunities.